Alinx ZYNQ7000 FPGA User Manual page 9

ZYNQ FPGA Development Board AC7010/AC7020 User Manual
+1.8V, +1.0V three-way power supply through three DC/DC power supply chip
TLV62130RGT. Each output current can be up to 3A. The 3.3V, VCCIO34 and
VCCI35 power supplies are generated by the three LDOs "SPX3819M5-3-3",
the VCCIO34 is powered by the BANK34 of ZYNQ, and the VCCIO35 is
powered by the BANK35 of ZYNQ. By replacing with other LDO chips, BANK34
and BANK35IO adapts to different voltage standards. +1.5V Generates VTT
and VREF voltages required by DDR3 via TI's TPS51200
The functions of each power distribution are shown in the following table
below:
Power Supply
+1.0V
+1.5V
+1.8V
+3.3V
VREF, VTT
VCCIO34
VCCIO35
Because the power supply of the PS and PL parts of ZYNQ has the
power-on sequence requirements, in the circuit design, we have designed
according to the power requirements of ZYQN. The power-on sequence is
+1.0V->+1.8V->+1.5 V-> (3.3V, VCCIO34, VCCIO35). Figure 3-2 shows the
circuit design of the power supply:
9 / 40
ZYNQ Core Voltage
DDR3, ZYNQ Bank502
ZYNQ auxiliary voltage, ZYNQ PLL, ZYNQ BANK501, VCCIO,
Ethernet, USB 2.0
ZYNQ VCCIO, Gigabit Ethernet, Serial Port, HDMI, RTC,
FLASH,EEPROM SD Card
Amazon Store: https://www.amazon.com/alinx
Function
DDR3
ZYNQ Bank34
ZYNQ Bank35