Part 6.5: Usb To Serial Port - Alinx ZYNQ7000 FPGA User Manual
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ZYNQ FPGA Development Board AC7010/AC7020 User Manual
OTG_NXT
OTG_DATA0
OTG_DATA1
OTG_DATA2
OTG_DATA3
OTG_CLK
OTG_DATA5
OTG_DATA6
OTG_DATA7
OTG_RESETN
Part 6.5: USB to Serial Port
The AC7100/AC7200 FPGA development board uses the USB to UART
chip of Silicon Labs CP2102GM. The USB interface uses the Micro USB
interface. Users can connect to the PC for serial communication using a Micro
USB cable.
The TX/RX signal of the UART is connected to the signal of the PS
BANK501 of the ZYNQ EPP. Since the VCCMIO of the BANK is set to 1.8V, the
data level of the CP2102GM is 3.3V, which is connected by the TXS0102DCUR
level conversion chip. Figure 6-8 detailed the schematic diagram of the
CP2102GM and ZYNQ connections
27 / 40
PS_MIO31_501
PS_MIO32_501
PS_MIO33_501
PS_MIO34_501
PS_MIO35_501
PS_MIO36_501
PS_MIO37_501
PS_MIO38_501
PS_MIO39_501
PS_MIO46_501
Figure 6-8: CP2102GM Connection Diagram
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E16
USB Next Data Signal
A14
D15
A12
F12
A11
A10
E13
C18
D16
USB Data Bit0
USB Data Bit1
USB Data Bit2
USB Data Bit3
USB Clock Signal
USB Data Bit5
USB Data Bit6
USB Data Bit7
USB Reset Signal
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