Uart B; Uart B General Register Set; Uart B Baud Rate Register Set; Uart B Enhanced Register Set - Kontron PEP CP321 Manual

Power pc-based cpu board for compactpci applications
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CP321
4.4.2

UART B

The following table indicate the address mapping of the UART B. For a more detailed descrip-
tion please refer to the EXAR XR16C2850 DUART manual.
Table 4-18:UART B General Register Set
READ MODE
Receive Holding Register
n/a
Interrupt Status Register
n/a
n/a
Line Status Register
Modem Status Register
Scratchpad Register
Table 4-19:UART B Baud Rate Register Set
READ MODE
LSB of divisor latch
MSB of divisor latch
Table 4-20:UART B Enhanced Register Set
READ MODE
Trigger Level Register
Feature Control Register
Enhanced Feature Register
Enhanced Mode Select Register
Xon-1
Xon-2
Xoff-1
Xoff-2
ID 24977, Rev. 02
Transmit Holding Register
Interrupt Enable Register
FIFO Control Register
Line Control Register
Modem Control Register
n/a
n/a
Scratchpad Register
LSB of divisor latch
MSB of divisor latch
Trigger Level Register
Feature Control Register
Enhanced Feature Register
Enhanced Mode Select Register
Xon-1
Xon-2
Xoff-1
Xoff-2
© 2003 Kontron Modular Computers GmbH
WRITE MODE
WRITE MODE
WRITE MODE
Configuration
ADDRESS
0xFFE0 0008
0xFFE0 0009
0xFFE0 000A
0xFFE0 000B
0xFFE0 000C
0xFFE0 000D
0xFFE0 000E
0xFFE0 000F
ADDRESS
0xFFE0 0008
0xFFE0 0009
ADDRESS
0xFFE0 0008
0xFFE0 0009
0xFFE0 000A
0xFFE0 000B
0xFFE0 000C
0xFFE0 000D
0xFFE0 000E
0xFFE0 000F
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