Debug Interface And Pinout; Jtag Chain Layout - Kontron PEP CP321 Manual

Power pc-based cpu board for compactpci applications
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Functional Description
2.4.7

DEBUG Interface and Pinout

A JTAG/COP interface is provided on the CP321 for the manufacturer's use (logic program-
ming, JTAG test) or for software debugging. All the JTAG capable devices on the CP321 can
be accessed through the onboard JTAG chain. If EMULATOR access to the MPC8245 is re-
quired it must be ensured that R260 and R188 are set and also that R163 and R250 are re-
moved (all resistors are 0 ohm). When using this interface with emulator probes please use the
signals on pins: 7, 8, 11, 12, 13, 15, 17, and 19. These are the standard signals defined by Mo-
torola for the MPC8245 JTAG/COP port. All other signals are used for factory purposes.
The following figure illustrates the layout of the JTAG chain.
Figure 2-6: JTAG Chain Layout
MPC8240
TDI
TDI1
R260
TDI
TDX4
TDO
R185
Default setting:
Resistor installed
Resistor not installed
Note...
As shipped, only the Altera onboard logic can be detected by means of
the JTAG interface. If the JTAG interface requires to be reconfigured
for software debugging, please contact Support at Kontron Modular
Computers for assistance.
Page 2 - 18
3.3V
R249
10k
TDO
TDI
TDX1
TDI2
R182
R250
R189
R188
© 2003 Kontron Modular Computers GmbH
Altera
Logic
TDO
TDX2
R198
R163
CP321
21154
TDI
TDO
TDX3
ID 24977, Rev. 02

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