Kontron PEP CP321 Manual page 5

Power pc-based cpu board for compactpci applications
Table of Contents

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CP321
Chapter
3.
Installation ................................................................................................... 3 - 3
3.1 Board Installation ..................................................................................... 3 - 3
3.2 Placement of the CP321 ......................................................................... 3 - 3
3.3 Front Panel I/O Connectors .................................................................... 3 - 4
3.4 Assembly of the CP321 and Options ...................................................... 3 - 4
3.5 Software Installation ................................................................................ 3 - 5
Chapter
4.
Configuration ............................................................................................... 4 - 3
4.1 Jumper and Resistor Settings ................................................................. 4 - 3
4.1.1
J1 - Bootstrap Loader / Socket Jumper .......................................... 4 - 3
4.1.2
J2 - Realtime Clock (RTC) Calibration Output ................................ 4 - 3
4.1.3
4.2 Board Address Map ................................................................................ 4 - 5
4.3 Board Control Registers .......................................................................... 4 - 7
4.3.1
Board ID Register ........................................................................... 4 - 8
4.3.2
Software Compatibility ID ............................................................... 4 - 8
4.3.3
Memory Configuration Register ...................................................... 4 - 9
4.3.4
Flash Bank Select Register .......................................................... 4 - 10
4.3.5
SRAM Bank Select Register ......................................................... 4 - 10
4.3.6
Watchdog Control Register ........................................................... 4 - 11
4.3.7
Interrupt Enable Register .............................................................. 4 - 12
4.3.8
Control Register ............................................................................ 4 - 13
4.3.9
Coding Switch Register ................................................................ 4 - 14
4.3.10 Board Logic / Revision Register ................................................... 4 - 14
4.3.11 Event Register .............................................................................. 4 - 15
4.4 UART Registers Address Mapping ....................................................... 4 - 16
4.4.1
UART A ......................................................................................... 4 - 16
4.4.2
UART B ......................................................................................... 4 - 17
ID 24977, Rev. 02
3
4
© 2003 Kontron Modular Computers GmbH
Preface
Page v

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