Details Of Input Signals - Mitsubishi Electric MELSEC iQ-R Series User Manual

Details of input signals

The following describes the details of the input signals for the D/A converter module which are assigned to the CPU module.
The I/O numbers (X/Y) described in this section are for the case when the start I/O number of the D/A converter module is set
to 0.
This section describes buffer memory addresses for CH1. For details on the buffer memory addresses for
CH2 and later, refer to the following.
Page 146 List of buffer memory areas
Module READY
Common
'Module READY' (X0) turns on to indicate the preparation for the D/A conversion is completed after the power-on or the reset
operation of the CPU module.
In the following cases, 'Module READY' (X0) turns off.
• In the offset/gain setting mode (In this case, the D/A conversion processing is performed.)
• When a watchdog timer error occurs in the D/A converter module (In this case, the D/A conversion processing is not
performed.)
■Device number
The following shows the device number of this input signal.
Signal name
Module READY
APPX
136
Appendix 2 I/O Signals
CH1 CH2
X0
CH3 CH4