Details Of Output Signals - Mitsubishi Electric MELSEC iQ-R Series User Manual

Details of output signals

The following describes the details of the output signals for the D/A converter module which are assigned to the CPU module.
The I/O numbers (X/Y) described in this section are for the case when the start I/O number of the D/A converter module is set
to 0.
This section describes I/O signals and buffer memory addresses for CH1. For details on the buffer memory
addresses for CH2 and later, refer to the following.
Page 146 List of buffer memory areas
CH1 Output enable/disable flag
Common
Set whether to output the D/A conversion value or offset value.
On: D/A conversion value
Off: Offset value
■Device number
The following shows the device number of this output signal.
Signal name
CH Output enable/disable flag
Operating condition setting request
Common
Turn on and off Operating condition setting request to enable the setting of the D/A converter module.
For the timing of turning on and off the signal, refer to the following.
Page 138 Operating condition setting completed flag
For details on the buffer memory areas to be enabled, refer to the following.
Page 146 List of buffer memory areas
■Device number
The following shows the device number of this output signal.
Signal name
Operating condition setting request
CH1 CH2
Y1 Y2
CH1 CH2
Y9
CH3 CH4
Y3 Y4
CH3 CH4
APPX
Appendix 2 I/O Signals
A
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