Xilinx KCU116 User Manual page 50

The Silicon Labs CP2105GM dual USB-to-UART bridge circuit is shown in
X-Ref Target - Figure 3-17
Table 3-14 lists the CP2105GM connections to FPGA U1. The USB UART schematic nets are
named from the perspective of the CP2105GM device (U166).
Table 3‐14: FPGA U1 to CP2105GM U166 Connections
XC7Z010 SoC (U161)
FPGA U1
Function Direction I/O Standard
Pin
C12 TX Output
B15 RX
XCKU5P FPGA (U1)
W12 RX
W13 TX Output
Y13 CTS Output
AA13 RTS
KCU116 Board User Guide
UG1239 (v1.2) September 28, 2018
Figure 3‐17: KCU116 Dual UART CP2105GM
LVCMOS18
Input LVCMOS18
Input LVCMOS18
LVCMOS18
LVCMOS18
Input LVCMOS18
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Chapter 3: Board Component Descriptions
Schematic Net
Name
Pin
SYSCTLR_UART_TX 12
SYSCTLR_UART_RX 13
USB_UART_TX 21
USB_UART_RX 20
USB_UART_CTS 18
USB_UART_RTS 19
Figure 3-17.
CP2105GM Device (U166)
Function Direction
RXD Input
TXD Output
TXD Output
RXD Input
CTS Input
RTS Output
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