Xilinx KCU116 User Manual page 22

The KCU116 dual DDR4 memory component interface adheres to the constraints guidelines
documented in the "DDR3/DDR4 Design Guidelines" section of the UltraScale
Architecture-Based FPGAs Memory IP LogiCORE IP Product Guide (PG150)
KCU116 board DDR4 memory component interface is a 40 impedance implementation.
For more details about the Micron DDR4 component memory, see the Micron
MT40A256M16GE-075E data sheet at the Micron website
KCU116 Board User Guide
UG1239 (v1.2) September 28, 2018
Chapter 3: Board Component Descriptions
www.xilinx.com
[Ref 5]. The
[Ref 23].
Send Feedback
22