Performance Verification
3-10
7. Set Play > Update > On.
8. Select Play > Clock to open the Clock dialog box.
9. In the Clock dialog box, select ExtRef 10.
10. Press the PLAY button on the RTX100A to start playing the test64.TRP file.
11. Verify that PLL unlock error does not occur on the RTX100A.
12. Start the TS Compliance Analyzer on the MPEG analyzer.
13. In the Open Transport Stream dialog box, select Real-time Analysis, and
then make the following settings
Interfaces
. . . . . . . . . . .
Interface Settings
14. Click the OK button.
15. Verify that the hierarchic view is displayed on the MPEG analyzer screen
and that no error messages appear. In addition, verify that the bit rate is 64
Mbps and the packet size is 188 bytes.
NOTE. Ignore Program 3 and PID 120 (0x78) errors in the hierarchical view
because these are caused by the original test40.TRP file.
16. Change the clock source setting on the RTX100A and output frequency
setting on the function generator with the following and then repeat step 15.
Clock source setting (RTX100A)
ExtRef 27
Ext Ref 8.126984 MHz
Ext P Clk
17. Change the output frequency of the function generator to 32 MHz.
18. Select Play > Clock on the RTX100A to open the Clock dialog box.
19. In the dialog box, select Ext S Clk.
20. Repeat step 15 and verify that all items in the Priority 1 row are green.
NOTE. Ignore 2.3.a PCR Repetition and 2.5 PTS errors in the Priority 2 row.
21. Press the STOP button on the RTX100A to stop the stream output.
DVB Parallel
. . . .
Time Stamping
Output frequency setting (function generator)
27 MHz
8.126984 MHz
8 MHz
RTX100A ISDB-T RF Signal Generator Service Manual
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