Fluke 9100A-017 Manual page 17

Table 2-1. Vector Output I/O Module Specifications (cont)
VECTOR OUTPUT I/O MODULE INPUT SECTION:
Input Impedance ................................................... 50 KΩ Minimum, 90 KΩ typical. 100
Operating Voltage Range...................................... -0.5V to +5.5V (all lines)
Input/Output Protection ......................................... +10V/-5V for one minute max. one
Input Thresholds:
TTL
- - - 5.0V - - - - - - - - 5.0V - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - 2.6V - - - - - - - - 3.4V - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - 2.1V - - - - - - - - 2.9V - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - 1.0V - - - - - - - - 1.2V - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - 0.6V - - - - - - - - 0.8V - - - - - - - - - - - - - - - - - - - - - - - - - -
- - - 0.0V - - - - - - - - 0.0V - - - - - - - - - - - - - - - - - - - - - - - - - -
CLOCK, START, STOP, and ENABLE Inputs:
Thresholds:
Logic LOW................................................... 0.8V maximum.
Logic HIGH.................................................. 2.0V minimum.
Input Current .................................................... 125 µA. maximum
Input/Output Protection .................................... +10V/-5V for one minute maxi-
Transition Counter:
Maximum Frequency........................................ 10 MHz minimum.
Maximum Count (Transition Mode) .................. 8388608 (23 bits) counts
Frequency Accuracy (Frequency Mode) .......... ±250 ppm ±2 Hz
Stop Counter:
Maximum Frequency........................................ 10 MHz
Maximum Count ............................................... 65535 clocks
Clock:
Maximum Frequency........................................ 10 MHz
Minimum Pulse Width ...................................... 50ns
Timing for Synchronous Measurements:
Maximum Frequency of Clock.......................... 10 MHz
Maximum Frequency of Data ........................... 5MHz
Data Setup Time .............................................. 30 ns minimum
Data Hold Time ................................................ 30 ns minimum
Minimum Pulse Width
(Start/Stop/Enable/Clock) ............................ 50ns
Start Edge Setup Time (before clock edge,
for clock to be recognized) .......................... 0 ns minimum
* Input capacitance includes the Y9100A-102 Card Edge Interface Module.
CMOS
Guaranteed HIGH
HIGH or INVALID
Guaranteed INVALID
LOW or INVALID
Guaranteed LOW
pF Maximum, 65 pF typical. *
line only (all lines).
LEVEL
mum, one line only.
(+ overflow).
9100A-017
2-3