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XCMDSEL (6B)
LS174
Figure 5-25
Display Mode Register Circuit
The write operation (into the Display Mode register)
starts at the
rising (leading) edge of the *WRTE signal, which is in
synchronization with the CRTC clock.
The signals output to the Display Mode register are as follows:
(1)
(2)
(3)
(4)
(5)
(6)
HIGH TEXT
HIGH in the TEXT 80x25 and GRAPHIC 640x400 modes
GRAPHIC
HIGH in the GRAPHIC mode
CMDSET
Stays HIGH after the WRITE instruction is executed to write into
the Display Mode register (1i.e., after power has been turned
on).
EN VIDEO
Enables or disables the screen display.
HIGH when display is
enabled.
HIGH GRAPH
HIGH in the GRAPHIC 640x200 and 640x400 modes.
EN BLINK
Enables blinking (bit 7 of attribute code)
in TEXT mode.
HIGH
when blinking is enabled.
IT - 51
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