Panasonic JB-3300 Technical Manual page 151

(a)
Memory address decoder
This circuit selects a memory device by decoding the contents of the
MPU address when the MPU or DMAC accesses a memory device.
Decoded upper six bits, AB14 to AB19, of the address bus provide an
MPU address.
Short plug J13 determines whether or not an expansion 256K RAM chips
is installed. The output signal *DACKO from the DMAC determines
whether or not RAM refresh is taking place.
LSOO
ABI4
LS32
ABIS5 XROMSEL
(To ROM chip
select)
(To PDP
controller)
XVRAMSEL
XDACKO RAMSEL
"XRAMASEL
A
(SEL (To CAS
decoding
(SEL B) circuit)
Figure 5-12 Memory Address Decoding Circuit
Short plug J13 has the following meanings:
o Short: Without an expansion 256K-byte RAM (256K-byte system)
Oo Open: With an expansion 256K-byte RAM (512K-byte system)
The memory address decoder is made up of a fuse ROM (24510) and
several gate logic circuits.
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