Panasonic JB-3300 Technical Manual page 141

(b) System clock generation circuit
A quartz oscillation module is used for the clock oscillation source.
The oscillation frequency is 14.31818 MHz. The original oscillation
frequency is demultiplied to produce MPU and other clock frequencies.
Demultiplication is performed by 8284A and a demultiplier circuit.
oO Original oscillation frequency 14.31818 MHz
o 1/3 demultiplication (8284A) 4.77 MHz
CLK - microprocessor clock
o 1/6 demultiplication (8284A) 2.3814 MHz
PCLK - I/O control clock
o 1/12 demultiplication 1.1932 MHz
SCLK - Timer clock
A 4.77-MHz clock DCLK with a duty cycle of approximately 50% is
produced from the microprocessor clock (CLK) using a delay device
(LS31) for DMAC.
o 1/3 demultiplication (50% duty cycle) 4.77 MHz
DCLK - DMAC clock
+5V
—
4 cuKES CLK
—. osc
7
8
yee
.
14.31818MHz
| PCLK
PCLK
7
yIT D Q SCLK
CK
Qp—
+5V LS175
Tr SOO
DCLK
CLK D
SOOo
LS3!
Figure 5-3 System Clock Generation Circuit
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