Panasonic JB-3300 Technical Manual page 130

Address Bus peevzzwzwmaarara Oo ZZ
(AB19-ABO)
Data Bus
(DO7 to DOO)
Data Bus
(DB7 to DBO)
nine
I/O Data
Ln
Control Bus ~—e-———=-
Output Data Bus
Memory
.
—y| Buffer
Data Latch
(DB7—DBO)
Address ZIZZZZZZPA Video-RAM (Even)
MPX. y (16K Bytes)
1
1)
/ I/O Data
H (16K Bytes) Buffer Input Data
Y
ytes
er
Memory Y (Even) Buff
Address honk
MPX.
rnnncan, —
Parameter CRIC Data Latch Data Latch
Converter (Even) (odd)
HD68A45S /
HD68B45S
<7 Attribute
Decoder
Display |
Mode
Video
.
> DATA 0-3
—osest
Generator
Character Video Data a 4
— Generator
1 (8K Bytes) ly MPX.
Status
ytes a+4
Register
Read/Writ
Timing
Synchronous
HS
Cont 1
Generator
Sugnal
———> vs
onctro er
Generator SCK
m
18.432 MHz
Figure 4-2 PDP Controller Block Diagram