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Xilinx DPU IP Product Manual page 38
Dpu for convolutional neural network v1.2
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Chapter 6: Example Design
Figure 29: TRD Block Design
4. In the GUI, click Generate Bitstream to generate the bit file, as shown in the following figure.
Figure 30: Generate Bitstream
DPU IP Product Guide
www.xilinx.com
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PG338 (v1.2) March 26, 2019
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