Example System with DPU
The figure below shows an example system block diagram with the Xilinx UltraScale+ MPSoC using a
camera input. DPU is integrated into the system through AXI interconnect to perform deep learning
inference tasks such as image classification, object detection, and semantic segmentation.
DisplayPort
USB3.0
SATA3.1
PCIe Gen2
GigE
USB2.0
UART
SPI
Quad SPI
NAND
SD
demosaic
MIPI
MIPI
Camera
CSI2
CSI2
DNNDK
Deep Neural Network Development Kit (DNNDK) is a full-stack deep learning toolchain for inference
with the DPU.
As shown in Figure 4, DNNDK is composed of Deep Compression Tool (DECENT), Deep Neural Network
Compiler (DNNC), Neural Network Runtime (N2Cube), and DPU Profiler.
DPU IP Product Guide
PG338 (v1.2) March 26, 2019
ARM
AXI Interconnect
Color_
gamma
conversion
Figure 3: Example System with Integrated DPU
www.xilinx.com
Chapter 1: Overview
R5
Controller
AXI Interconnect
AXI
DMA
Interconnect
Interconnect
DPU
Send Feedback
DDR
AXI
X22329-030719
8
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