Hardware Design Flow - Xilinx DPU IP Product Manual

Chapter 6: Example Design

Hardware Design Flow

This section describes how to create the DPU reference design project in the Xilinx Vivado Design Suite
and generate the bit file. The parameters of DPU IP in the reference design are configured accordingly.
Both the connections of the DPU interrupt and the assignment addresses for DPU in the reference
design should not be modified. If those connections or assignment address have been modified, the
reference design might not work properly.
Board Setup
The following figure shows the ZCU102 board with interfaces identified.
Figure 27: ZCU102 Board
DPU IP Product Guide www.xilinx.com 36
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PG338 (v1.2) March 26, 2019