I/O Bandwidth Requirements - Xilinx DPU IP Product Manual

Network Model
Inception-v1
ResNet50
SqueezeNet
Tiny-YOLO
YOLO-V2
Pruned YOLO-V2
YOLO-V3
Pruned YOLO-V3-
Notes:
1. The pruned models were generated by the Xilinx pruning tool.

I/O Bandwidth Requirements

When different neural networks run in the DPU, the I/O bandwidth requirement is different. Even the
I/O bandwidth requirement of different layers in one neural network are different. The I/O bandwidth
requirements for some neural networks, averaged by layer have been tested with one DPU core running
at full speed. The peak and average I/O bandwidth requirements of three different neural networks are
shown in Table 12. The table only shows the number of two commonly used DPU (B1152 and B4096).
Note that when multiple DPU cores run in parallel, each core might not be able to run at full speed due
to the limitation of I/O bandwidth.
Table 12: I/O Bandwidth Requirements for DPU-B1152 and DPU-B4096
Network Model
Inception-v1
Resnet50
SSD
Pruned YOLO-V3
If one DPU core needs to run at full speed, the peak I/O bandwidth required shall be met. The I/O
bandwidth is mainly used for accessing data though the AXI master interfaces (Dpu0_M_AXI_DATA0 and
Dpu0_M_AXI_DATA1).
DPU IP Product Guide
PG338 (v1.2) March 26, 2019
Table 11: Performance of Different Models
Workload Input Image
(Gops per Resolution
image)
3.2 224*224
7.7 224*224
0.698 224*224
6.97 448*448
82.5 640*640
18.4 640*640
53.7 512*256
4 512*256
DPU-B1152
Peak (MB/s) Average (MB/s)
1704 890
2052 1017
1516 684
2076 986
www.xilinx.com
Chapter 3: DPU Configuration
Frame per second (FPS)
405
175
1048
220
24
120
43
115
DPU-4096
Peak (MB/s) Average (MB/s)
4626 2474
5298 3132
5724 2049
6453 3290
Send Feedback
23