Q_Py_Pci_Pmon_Pkt_Mask1 Registers; Q_Py_Pci_Pmon_Pkt_Mask0 Registers - Intel Xeon E5-2600 Series Monitoring Manual

Table 2-90. Q_Py_PCI_PMON_PKT_MASK1 Registers
Field
---
RDS
---
RNID_3_0
Table 2-91. Q_Py_PCI_PMON_PKT_MASK0 Registers
Field
RNID_4
---
DNID
MC
OPC
VNW
---
2.7.3.3.1 Events Derived from Packet Filters
Following is a selection of common events that may be derived by using the Intel® QPI packet
matching facility. The Match/Mask columns correspond to the Match0/Mask0 registers. For the cases
where additional fields need to be specified, they will be noted.
92
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
HW
Bits Reset
Val
31:20 0x0 Reserved; Must write to 0 else behavior is undefined.
19:16 0x0 Response Data State (valid when MC == DRS and Opcode == 0x0-
2). Bit settings are mutually exclusive.
b1000 - Modified
b0100 - Exclusive
b0010 - Shared
b0001 - Forwarding
b0000 - Invalid (Non-Coherent)
15:4 0x0 Reserved; Must write to 0 else behavior is undefined.
3:0 0x0 Remote Node ID(3:0 - Leat Significant Bits)
HW
Bits Reset
Val
31 0x0 Remote Node ID(Bit 4 - Most Significant Bit)
30:18 0x0 Reserved; Must write to 0 else behavior is undefined.
17:13 0x0 Destination Node ID
12:9 0x0 Message Class
8:5 0x0 Opcode
See Section 2.10, "Packet Matching Reference"
opcodes that may be filtered per message class.
4:3 0x0 Virtual Network
2:0 0x0 Reserved; Must write to 0 else behavior is undefined.
Description
Description
for a listing of
Reference Number: 327043-001