Caching Agent (Cbo) Performance Monitoring; Overview Of The Cbo - Intel Xeon E5-2600 Series Monitoring Manual

Table 2-7. Unit Masks for EVENT_MSG
Extension
VLW_RCVD
MSI_RCVD
IPI_RCVD
DOORBELL_RCVD
INT_PRIO
LOCK_CYCLES
• Title: IDI Lock/SplitLock Cycles
• Category: LOCK Events
• Event Code: 0x44
• Max. Inc/Cyc: 1, Register Restrictions: 0-1
• Definition: Number of times an IDI Lock/SplitLock sequence was started
2.3

Caching Agent (Cbo) Performance Monitoring

2.3.1

Overview of the CBo

The LLC coherence engine (CBo) manages the interface between the core and the last level cache
(LLC). All core transactions that access the LLC are directed from the core to a CBo via the ring
interconnect. The CBo is responsible for managing data delivery from the LLC to the requesting core.
It is also responsible for maintaining coherence between the cores within the socket that share the
LLC; generating snoops and collecting snoop responses from the local cores when the MESIF protocol
requires it.
So, if the CBo fielding the core request indicates that a core within the socket owns the line (for a
coherent read), the request is snooped to that local core. That same CBo will then snoop all peers
which might have the address cached (other cores, remote sockets, etc) and send the request to the
appropriate Home Agent for conflict checking, memory requests and writebacks.
In the process of maintaining cache coherency within the socket, the CBo is the gate keeper for all
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Intel QuickPath Interconnect (Intel
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ensuring that all Intel
The CBo manages local conflicts by ensuring that only one request is issued to the system for a
specific cacheline.
The uncore contains up to eight instances of the CBo, each assigned to manage a distint 2.5MB slice
of the processor's total LLC capacity. A slice that can be up to 20-way set associative. For processors
with fewer than 8 2.5MB LLC slices, the CBo Boxes or missing slices will still be active and track ring
traffic caused by their co-located core even if they have no LLC related traffic to track (i.e. hits/
misses/snoops).
Every physical memory address in the system is uniquely associated with a single CBo instance via a
proprietary hashing algorithm that is designed to keep the distribution of traffic across the CBo
instances relatively uniform for a wide range of possible address patterns. This enables the individual
CBo instances to operate independently, each managing its slice of the physical address space without
any CBo in a given socket ever needing to communicate with the other CBos in that same socket.
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Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
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QPI) messages that originate in the core and is responsible for
QPI messages that pass through the socket's LLC remain coherent.
Description
Reference Number: 327043-001