Intel Xeon E5-2600 Series Monitoring Manual page 84

FREQ_MAX_CURRENT_CYCLES
• Title: Current Strongest Upper Limit Cycles
• Category: FREQ_MAX_LIMIT Events
• Event Code: 0x07
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of cycles when current is the upper limit on frequency.
• NOTE: This is fast path, will clear our other limits when it happens. The slow loop portion, which
covers the other limits, can double count EDP. Clearing should fix this up in the next fast path
event, but this will happen. Add up all the cycles and it wontmakesense,butthegeneraldistribution-
istrue.'
FREQ_MAX_LIMIT_THERMAL_CYCLES
• Title: Thermal Strongest Upper Limit Cycles
• Category: FREQ_MAX_LIMIT Events
• Event Code: 0x04
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of cycles when thermal conditions are the upper limit on frequency.
This is related to the THERMAL_THROTTLE CYCLES_ABOVE_TEMP event, which always counts cycles
when we are above the thermal temperature. This event (STRONGEST_UPPER_LIMIT) is sampled
at the output of the algorithm that determines the actual frequency, while THERMAL_THROTTLE
looks at the input.
FREQ_MAX_OS_CYCLES
• Title: OS Strongest Upper Limit Cycles
• Category: FREQ_MAX_LIMIT Events
• Event Code: 0x06
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of cycles when the OS is the upper limit on frequency.
• NOTE: Essentially, this event says the OS is getting the frequency it requested.
FREQ_MAX_POWER_CYCLES
• Title: Power Strongest Upper Limit Cycles
• Category: FREQ_MAX_LIMIT Events
• Event Code: 0x05
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of cycles when power is the upper limit on frequency.
FREQ_MIN_IO_P_CYCLES
• Title: IO P Limit Strongest Lower Limit Cycles
• Category: FREQ_MIN_LIMIT Events
• Event Code: 0x01
• Extra Select Bit: Y
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of cycles when IO P Limit is preventing us from dropping the fre-
quency lower. This algorithm monitors the needs to the IO subsystem on both local and remote
sockets and will maintain a frequency high enough to maintain good IO BW. This is necessary for
when all the IA cores on a socket are idle but a user still would like to maintain high IO Bandwidth.
84
Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
Reference Number: 327043-001