Intel Xeon E5-2600 Series Monitoring Manual page 65

Intel® Xeon® Processor E5-2600 Product Family Uncore Performance Monitoring
• Definition: Counts the number of DRAM Activate commands sent on this channel. Activate com-
mands are issued to open up a page on the DRAM devices so that it can be read or written to with a
CAS. One can calculate the number of Page Misses by subtracting the number of Page Miss pre-
charges from the number of Activates.
CAS_COUNT
• Title: DRAM RD_CAS and WR_CAS Commands.
• Category: CAS Events
• Event Code: 0x04
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: DRAM RD_CAS and WR_CAS Commands
Table 2-66. Unit Masks for CAS_COUNT
Extension
RD_REG
RD_UNDERFILL
RD
WR_WMM
WR_RMM
WR
ALL
DRAM_PRE_ALL
• Title: DRAM Precharge All Commands
• Category: DRAM_PRE_ALL Events
• Event Code: 0x06
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of times that the precharge all command was sent.
DRAM_REFRESH
• Title: Number of DRAM Refreshes Issued
• Category: DRAM_REFRESH Events
• Event Code: 0x05
• Max. Inc/Cyc: 1, Register Restrictions: 0-3
• Definition: Counts the number of refreshes issued.
Reference Number: 327043-001
umask
[15:8]
bxxxxxxx1 All DRAM RD_CAS (w/ and w/out auto-pre):
Counts the total number or DRAM Read CAS commands issued on
this channel. This includes both regular RD CAS commands as well
as those with implicit Precharge. AutoPre is only used in systems
that are using closed page policy. We do not filter based on major
mode, as RD_CAS is not issued during WMM (with the exception of
underfills).
bxxxxxx1x Underfill Read Issued:
Counts the number of underfill reads that are issued by the memory
controller. This will generally be about the same as the number of
partial writes, but may be slightly less because of partials hitting in
the WPQ. While it is possible for underfills to be issed in both WMM
and RMM, this event counts both.
b00000011 All DRAM Reads (RD_CAS + Underfills):
Counts the total number of DRAM Read CAS commands issued on
this channel (including underfills).
bxxxxx1xx DRAM WR_CAS (w/ and w/out auto-pre) in Write Major Mode:
Counts the total number or DRAM Write CAS commands issued on
this channel while in Write-Major-Mode.
bxxxx1xxx DRAM WR_CAS (w/ and w/out auto-pre) in Read Major Mode:
Counts the total number of Opportunistic" DRAM Write CAS
commands issued on this channel while in Read-Major-Mode.
b00001100 All DRAM WR_CAS (both Modes):
Counts the total number of DRAM Write CAS commands issued on
this channel.
b00001111 All DRAM WR_CAS (w/ and w/out auto-pre):
Counts the total number of DRAM CAS commands issued on this
channel.
Description
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