VeEX MTT-14B User Manual page 89

MTT-14B e_Manual D07-00-083P RevA00 Page 89 of 101
Two things to remember when using CRC-4 errors to determine
the performance of an E1 circuit. Each individual CRC-4 error
does not necessarily correspond to a single bit error. Multiple bit
errors within the same sub-multiframe will lead to only one CRC-
4 error for the block. Also, it is possible that errors could occur
such that the new CRC-4 bits are calculated to be the same as
the original CRC-4 bits.
CRC-4 error checking is a convenient method of identifying bit
errors within an in-service system. On an in-service system, it is
generally not possible to measure the actual bit errors because
there is no pattern synch. Bit error measurement is used on an
out-of-service system because the results are more precise.
CRC-4 uses a multiframe structure consisting of 16 frames,
as shown in Figure 63. However, the CRC-4 multiframe is not
necessarily aligned with the MFAS multiframe. Each CRC-4 mul-
tiframe can be divided into 2 sub multiframes (SMFRM). These
are labeled SMFRM1 and SMFRM2 and consist of 8 frames
apiece. Four bits of CRC information are associated with each
sub-multiframe.
The CRC-4 bits are calculated for each sub-multiframe, buffered,
and inserted into the following sub-multiframe to be transmitted
across the E1 span.
When the terminating equipment calculates an error using CRC-4,
it should transmit an E-bit to the far end, thus informing the far
end equipment of the error.
E-bit Performance Monitoring
When the terminal equipment of a 2.048 circuit is optioned for
CRC-4 transmission, E-bit transmission may also be enabled.
E-bit performance monitoring of the circuit is now possible. The
terminating equipment transmits an E-bit error on the 2.048
Mbit/s line, when it receives a CRC-4 error. However, E-bit error
transmission is a relatively new feature in 2.048 transmission.
Therefore, it is likely that the embedded equipment does not
transmit the E-bit error information correctly. Check the specifi-
cations of the network to see if this is available.
When this type of terminal equipment detects an incoming CRC-4
error, it will respond by transmitting an E-bit error toward the other
terminal. Test set 2, shown in Figure 64, will be able to see the
E-bit errors by plugging into a protected monitoring point. Note
that the test set can not see the actual code errors, framing bit
errors and CRC errors introduced at the trouble point. The test
set can see only the E-bit errors transmitted by Terminal B. Thus,
E-bit error transmission allows a 2.048 Mbit/s in-service circuit
to be reliably monitored for transmission performance from any
point on the circuit.