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MTT-14B e_Manual D07-00-083P RevA00
• When CRC is enabled, bit 1 is used for the Cyclic Redundancy
Check-4 performance monitoring. When CRC is enabled, this
bit may only be changed when CRC is disabled.
• The second bit is set to 1 to avoid FAS signal confusion.
• Bit A is used for the Remote (FAS) Distant Alarm. This bit is
set to 1 to indicate an alarm. It is set to 0 for no alarm.
• Spare bits (4-8): Are set to 1 for crossing an international border.
When unused, their settings are defined by ITU-T G.704.
The first bits of frames 13 and 15 transmit the two E-bits, which are
used to indicate CRC-4 errors. A 0 in this bit denotes received er-
rored sub-multiframes; a 1 represents errorless received frames.
MFAS (MultiFrame Alignment Signal)
FRM 0
FRM 1
TS 0 -------- TS 16 -------- TS 31
TS 0 -------- TS 16 -------- TS 31
BITS
1
2
3
4
5
6
7
8
1
2
A
B
0
0
0
0
X
Y
X
X
Ch 1 (TS-1)
Notes:
•
Frame 0, timeslot 16: 8 bit MFAS signal.
•
Frames 1-15, time slot 16:
(4 signalling bits per channel)(30 channels) /
(8 signalling bits per frame timeslot 16) =
15 frames of timeslot, 16 signalling.
•
Frame 0 TS 16 bits: MFAS = 0000
•
NMFAS = XYXX, where X is spare bits. If this is not used,
then this is 1). Y is the MFAS remote alarm. If MFAS synch is
lost, then this is 1.
•
Frames are transmitted with 30 voice channels in time slots 1
through 15, and 17 through 31.
•
Timeslot 16 (TS16) contains A/B/C/D bits for signalling (CAS).
•
MFAS multiframe consistes of 16 frames.
Figure 62 MFAS Framing Format
MFAS framing provides CAS (Channel-Associated Signalling) to
transmit A/B/C/D bit supervision information for each channel.
This method uses the 32 timeslot frame format including timeslot
0 for the FAS. This method also uses timeslot 16 for the MFAS
and the CAS. It takes 16 frames to make up a MultiFrame.
When the MFAS frame is transmitted, all of the individual FAS
frames and framing information intact is left intact. The 16 FAS
frames are assembled together, dedicating timeslot 16 of the first
frame to MFAS framing information, then dedicating timeslot 16
of the remaining 15 frames to A/B/C/D bits as in Figure 62.
FRM 2
FRM 3 --------- FRM 15
TS 0 -------- TS 16 -------- TS 31
BITS
BITS
3
4
5
6
7
8
1
2
3
4
5
C
D
A
B
C
D
A
B
C
D
A
Ch 16 (TS-17)
Ch 15 (TS-15)
Ch 30 (TS-31)
6
7
8
B
C
D
Page 87 of 101
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