Mitsubishi Electric Melsec iQ-R Series User Manual page 23

Hart-enabled analog-digital converter module
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Monitoring of HART device variables
When the HART communication starts, HART device variables (PV value, SV value, TV value, and QV value) of the used
HART-enabled device are stored in the following buffer memory areas.
• 'CH1 PV value' (Un\G2084, Un\G2085)
• 'CH1 SV value' (Un\G2086, Un\G2087)
• 'CH1 TV value' (Un\G2088, Un\G2089)
• 'CH1 QV value' (Un\G2090, Un\G2091)
Each buffer memory area is refreshed every HART cycle time.
• A value stored in HART device variables differs depending on the used HART-enabled device. For details
on the stored values, refer to the manual of the used HART-enabled device.
• When there is no HART device variable corresponding to the used HART-enabled device, 7FA00000H is
stored.
■Precautions when data is read
The refreshing cycle of HART device variables (HART cycle time) and sequence scan of the CPU module are asynchronous.
Because of this, when HART device variables are read to the CPU module while written to the buffer memory areas of the A/
D converter module, data inconsistency may occur.
To prevent data inconsistency of HART device variables, read HART device variables according to the following procedures.
1.
Turn off and on 'HART device variables access request' (Y3).
2.
'HART device variables access flag' (X3) turns on. After checking this flag is on, read HART device variables.
3.
After the reading is completed, turn on and off 'HART device variables access request' (Y3).
4.
Check that 'HART device variables access flag' (X3) is off. Values of buffer memory areas of HART device variables are
not refreshed while 'HART device variables access flag' (X3) is on.
1 FUNCTIONS
1.3 HART Communication Function
1
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