Mitsubishi Electric Melsec iQ-R Series User Manual page 141

Hart-enabled analog-digital converter module
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CH1 HART device information (revisions)
Revision information of the used HART-enabled device is stored. For details on the stored values, refer to the manual of the
used HART-enabled device.
Two words of the buffer memory areas are used per channel and stored as follows.
b15 b14 b13 b12 b11 b10 b9
Un\G2532
(2)
b15 b14 b13 b12 b11 b10 b9
Un\G2533
(5)
(1) Universal command major revision
(2) Device revision level
(3) Software revision level
(4) Physical signaling code
(5) Hardware revision level
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory name
CH HART device information (revisions)
b8
b7
b6
b5
b4
b3
(1)
b8
b7
b6
b5
b4
b3
(4)
(3)
CH1
CH2
CH3
2532
2632
2732
2533
2633
2733
b2
b1
b0
b2
b1
b0
CH4
CH5
CH6
2832
2932
3032
2833
2933
3033
Appendix 3 Buffer Memory Areas
CH7
CH8
3132
3232
3133
3233
A
APPX
139

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