Siemens Simatic S7-200 System Manual page 420

Special Memory (SM) Bits
SMB6: CPU ID Register
As described in Table D-7, SMB6 is the CPU identification register. SM6.4 to SM6.7 identify
the type of CPU. SM6.0 to SM6.3 are reserved for future use.
Table D-7
SM Bits
Format
SM6.4 to xxxx = 0000 = CPU 212
SM6.7
SM6.0 to
Reserved
SM6.3
SMB7: Reserved
SMB7 is reserved for future use.
SMB8 to SMB21: I/O Module ID and Error Registers
SMB8 through SMB21 are organized in byte pairs for expansion modules 0 to 6. As
described in Table D-8, the even-numbered byte of each pair is the module-identification
register. These bytes identify the module type, the I/O type, and the number of inputs and
outputs. The odd-numbered byte of each pair is the module error register. These bytes
provide an indication of any errors detected in the I/O for that module.
Table D-8
SM Byte
Format
SMB8 Module 0 ID register
SMB9 Module 0 error register
SMB10 Module 1 ID register
SMB11 Module 1 error register
D-4
Special Memory Byte SMB6
MSB LSB
7 0
x x x x r r r r
0010 = CPU 214
1000 = CPU 215
1001 = CPU 216
Special Memory Bytes SMB8 to SMB21
Even-Number Byte: Module ID Register
MSB LSB
7
M t t A i i Q Q
M: Module present 0 = Present
1 = Not present
tt: 00 I/O module
01 Reserved
10 Reserved
11 Reserved
A I/O type 0 = Discrete
1 = Analog
ii 00 No inputs
01 2 AI or 8 DI
10 4 AI or 16 DI
11 8 AI or 32 DI
Description
CPU ID register
Description
Odd-Number Byte: Module Error
Register
MSB
0 7
C 0 0 0 R P
C: Configuration error
R: Out-of-range error
P: No user power
rr: Reserved
QQ 00 No outputs
01 2 AQ or 8 DQ
10 4 AQ or 16 DQ
11 8 AQ or 32 DQ
S7-200 Programmable Controller System Manual
C79000-G7076-C230-02
LSB
0
r r