Siemens Simatic S7-200 System Manual page 218

Programmable controller
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Instruction Set
Status Byte
A status byte is provided for each high-speed counter that provides status memory bits that
indicate the current counting direction, if the current value equals preset value, and if the
current value is greater than preset. Table 10-9 defines each of these status bits for each
high-speed counter.
Table 10-9
HSC0
HSC1
SM36.0 SM46.0 SM56.0 Not used
SM36.1 SM46.1 SM56.1 Not used
SM36.2 SM46.2 SM56.2 Not used
SM36.3 SM46.3 SM56.3 Not used
SM36.4 SM46.4 SM56.4 Not used
SM36.5 SM46.5 SM56.5 Current counting direction status bit:
SM36.6 SM46.6 SM56.6 Current value equals preset value status bit:
SM36.7 SM46.7 SM56.7 Current value greater than preset value status bit:
Note
Status bits for HSC0, HSC1, and HSC2 are valid only while the high-speed counter
interrupt routine is being executed. The purpose of monitoring the state of the high-speed
counter is to enable interrupts for the events that are of consequence to the operation
being performed.
HSC Interrupts
HSC0 supports one interrupting condition: interrupt on current value equal to preset value.
HSC1 and HSC2 provide three interrupting conditions: interrupt on current value equal to
preset value, interrupt on external reset activated, and interrupt on a counting direction
change. Each of these interrupt conditions may be enabled or disabled separately. For a
complete discussion on the use of interrupts, see the Interrupt Instructions.
To help you understand the operation of high-speed counters, the following descriptions of
the initialization and operation sequences are provided. HSC1 is used as the model counter
throughout these sequence descriptions. The initialization descriptions make the assumption
that the S7-200 has just been placed in the RUN mode, and for that reason, the first scan
memory bit is true. If this is not the case, remember that the HDEF instruction can be
executed only one time for each high-speed counter after entering RUN mode. Executing
HDEF for a high-speed counter a second time generates a run-time error and does not
change the counter setup from the way it was set up on the first execution of HDEF for that
counter.
10-30
Status Bits for HSC0, HSC1, and HSC2
HSC2
0 = counting down; 1 = counting up
0 = not equal; 1 = equal
0 = less than or equal; 1 = greater than
Description
S7-200 Programmable Controller System Manual
C79000-G7076-C230-02

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