Siemens Simatic S7-200 System Manual page 419

Programmable controller
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SMB4: Queue Overflow
As described in Table D-5, SMB4 contains the interrupt queue overflow bits, a status
indicator showing whether interrupts are enabled or disabled, and a transmitter-idle memory
bit. The queue overflow bits indicate either that interrupts are happening at a rate greater
than can be processed, or that interrupts were disabled with the global interrupt disable
instruction.
Table D-5
SM Bits
1
SM4.0
This bit is turned on when the communication interrupt queue has overflowed.
1
SM4.1
This bit is turned on when the input interrupt queue has overflowed.
1
SM4.2
This bit is turned on when the timed interrupt queue has overflowed.
SM4.3
This bit is turned on when a run-time programming problem is detected.
SM4.4
This bit reflects the global interrupt enable state. It is turned on when interrupts are
enabled.
SM4.5
This bit is turned on when the transmitter is idle (Port 0).
SM4.6
This bit is turned on when the transmitter is idle (Port 1).
SM4.7
Reserved.
1
Use status bits 4.0, 4.1, and 4.2 only in an interrupt routine. These status bits are reset when the queue
is emptied, and control is returned to the main program.
SMB5: I/O Status
As described in Table D-6, SMB5 contains status bits about error conditions that were
detected in the I/O system. These bits provide an overview of the I/O errors detected.
Table D-6
SM Bits
SM5.0
This bit is turned on if any I/O errors are present.
SM5.1
This bit is turned on if too many digital I/O points have been connected to the I/O bus.
SM5.2
This bit is turned on if too many analog I/O points have been connected to the I/O bus.
SM5.3 to
Reserved.
SM5.7
S7-200 Programmable Controller System Manual
C79000-G7076-C230-02
Special Memory Byte SMB4 (SM4.0 to SM4.7)
Special Memory Byte SMB5 (SM5.0 to SM5.7)
Special Memory (SM) Bits
Description
Description
D-3

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