Instruction Set
1
Clock
0
1
External
0
Direction
Control
(1 = Up)
Counter
Current
0
Value
Figure 10-11
When you use counting modes 6, 7, or 8 in HSC1 or HSC2, and a rising edge on both the up
clock and down clock inputs occurs within 0.3 microseconds of each other, the high-speed
counter may see these events as happening simultaneously to each other. If this happens,
the current value is unchanged and no change in counting direction is indicated. As long as
the separation between rising edges of the up and down clock inputs is greater than this time
period, the high-speed counter captures each event separately. In either case, no error is
generated and the counter maintains the correct count value. See Figure 10-12, Figure
10-13, and Figure 10-14.
Count
1
Up
0
Clock
Count
1
Down
0
Clock
Counter
Current
Value
0
Figure 10-12
10-24
Current value loaded to 0, preset loaded to 4, counting direction set to Up.
Counter enable bit set to enabled.
PV=CV interrupt generated
4
3
2
1
Operation Example of HSC1 or HSC2 Modes 3, 4, or 5
Current value loaded to 0, preset loaded to 4, initial counting direction set to Up.
Counter enable bit set to enabled.
PV=CV interrupt generated
3
2
1
Operation Example of HSC1 or HSC2 Modes 6, 7, or 8
PV=CV interrupt generated and
Direction Changed interrupt generated
5
4
3
2
1
PV=CV interrupt generated and
Direction Changed interrupt generated
5
4
4
3
2
S7-200 Programmable Controller System Manual
C79000-G7076-C230-02
1