Siemens Simatic S7-200 System Manual page 216

Instruction Set
Understanding the Different High-Speed Counters (HSC0, HSC1, HSC2)
All counters (HSC0, HSC1, and HSC2) function the same way for the same counter mode of
operation. There are four basic types of counter modes for HSC1 and HSC2 as shown in
Table 10-5. You can use each type: without reset or start inputs, with reset and without start,
or with both start and reset inputs.
When you activate the reset input, it clears the current value and holds it cleared until you
de-activate reset. When you activate the start input, it allows the counter to count. While start
is de-activated, the current value of the counter is held constant and clocking events are
ignored. If reset is activated while start is inactive, the reset is ignored and the current value
is not changed, while the start input remains inactive. If the start input becomes active while
reset remains active, the current value is cleared.
You must select the counter mode before a high-speed counter can be used. You can do this
with the HDEF instruction (High-Speed Counter Definition). HDEF provides the association
between a High-speed Counter (HSC0, HSC1, or HSC2) and a counter mode. You can only
use one HDEF instruction for each high-speed counter. Define a high-speed counter by
using the first scan memory bit, SM0.1 (this bit is turned on for the first scan and is then
turned off), to call a subroutine that contains the HDEF instruction.
Selecting the Active State and 1x/4x Mode
HSC1 and HSC2 have three control bits used to configure the active state of the reset and
start inputs and to select 1x or 4x counting modes (quadrature counters only). These bits are
located in the control byte for the respective counter and are only used when the HDEF
instruction is executed. These bits are defined in Table 10-6.
You must set these control bits to the desired state before the HDEF instruction is executed.
Otherwise, the counter takes on the default configuration for the counter mode selected. The
default setting of reset input and the start input are active high, and the quadrature counting
rate is 4x (or four times the input clock frequency) for HSC1 and HSC2. Once the HDEF
instruction has been executed, you cannot change the counter setup unless you first go to
the STOP mode.
Table 10-6
HSC1 HSC2
SM47.0 SM57.0
SM47.1 SM57.1
SM47.2 SM57.2
Control Byte
Once you have defined the counter and the counter mode, you can program the dynamic
parameters of the counter. Each high-speed counter has a control byte that allows the
counter to be enabled or disabled; the direction to be controlled (modes 0, 1, and 2 only), or
the initial counting direction for all other modes; the current value to be loaded; and the
preset value to be loaded. Examination of the control byte and associated current and preset
values is invoked by the execution of the HSC instruction. Table 10-7 describes each of
these control bits.
10-28
Active Level Control for Reset and Start; 1x/4x Select Bits for HSC1 and HSC2
Description (used only when HDEF is executed)
Active level control bit for Reset:
0 = Reset is active high; 1 = Reset is active low
Active level control bit for Start:
0 = Start is active high; 1 = Start is active low
Counting rate selection for Quadrature counters:
0 = 4X counting rate; 1 = 1X counting rate
S7-200 Programmable Controller System Manual
C79000-G7076-C230-02