Chapter 3: Bringing Up The Design; Set Up The Kcu1250 Board - Xilinx KCU1250 10GBASE-KR User Manual

Bringing Up the Design
This chapter describes how to bring up the 10GBASE-KR TRD. Instructions are provided for
setting up the KCU1250 board and backplane, programming the clock, programming the
FPGA, configuring virtual input/output (VIO), and running the Ethernet Controller
application.
Perform the preliminary setup procedures described in
IMPORTANT:
performing the bring up procedures described in this chapter.

Set Up the KCU1250 Board

Connect Bulls Eye Cables
1. Connect the SAMTEC Bulls Eye cables to J41 (GTH Transceiver Quad_226) and J42 (GTH
Transceiver Quad_227) as described in this video:
New GTX/GTH/GTZ Interconnect on Xilinx Characterization Boards
VIDEO:
2. The Bulls Eye SMA cables are numbered. Cable 15 is TX0_P, cable 16 is TX0_N, cable 17
is RX0_P and cable 18 is RX0_N. Connect the AC capacitors (Aeroflex SMA DC Blocks—
[Ref 5]) to TXN and TXP SMA connector on both Bulls Eye cables. Refer to pages 51 and
52 of the KCU1250 Characterization Board Schematics (XTP398)
10GBASE-KR Ethernet TRD
UG1058 (v2017.1) April 19, 2017 www.xilinx.com
Chapter 3
Chapter 2, Setup before
[Ref 12].
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