Table of Contents
Advertisement
TMS320C6748
SPRS590G – JUNE 2009 – REVISED JANUARY 2017
5.3
Recommended Operating Conditions
NAME
CVDD
Core Logic Supply Voltage (variable)
RVDD
Internal RAM Supply Voltage
(1)
RTC_CVDD
RTC Core Logic Supply Voltage
PLL0_VDDA
PLL0 Supply Voltage
PLL1_VDDA
PLL1 Supply Voltage
SATA_VDD
SATA Core Logic Supply Voltage
USB_CVDD
USB0, USB1 Core Logic Supply Voltage
USB0_VDDA18 USB0 PHY Supply Voltage
USB0_VDDA33 USB0 PHY Supply Voltage
USB1_VDDA18 USB1 PHY Supply Voltage
Supply
Voltage
USB1_VDDA33 USB1 PHY Supply Voltage
(2)
DVDD18
1.8V Logic Supply
SATA_VDDR
SATA PHY Internal Regulator Supply Voltage
(
DDR_DVDD18
DDR2 PHY Supply Voltage
2)
DDR_VREF
DDR2/mDDR reference voltage
DDR2/mDDR impedance control,
DDR_ZP
connected via 50Ω resistor to Vss
Power Group A Dual-voltage IO
DVDD3318_A
Supply Voltage
Power Group B Dual-voltage IO
DVDD3318_B
Supply Voltage
Power Group C Dual-voltage IO
DVDD3318_C
Supply Voltage
VSS
Core Logic Digital Ground
PLL0_VSSA
PLL0 Ground
PLL1_VSSA
PLL1 Ground
SATA_VSS
SATA PHY Ground
Supply
Ground
(3)
OSCVSS
Oscillator Ground
(3)
RTC_VSS
RTC Oscillator Ground
USB0_VSSA
USB0 PHY Ground
USB0_VSSA33 USB0 PHY Ground
High-level input voltage, Dual-voltage I/O, 3.3V
High-level input voltage, Dual-voltage I/O, 1.8V
Voltage
V
IH
Input High
High-level input voltage, RTC_XI
High-level input voltage, OSCIN
Low-level input voltage, Dual-voltage I/O, 3.3V
Low-level input voltage, Dual-voltage I/O, 1.8V
Voltage
V
IL
Input Low
Low-level input voltage, RTC_XI
Low-level input voltage, OSCIN
(1) The RTC provides an option for isolating the RTC_CVDD from the CVDD to reduce current leakage when the RTC is powered
independently. If these power supplies are not isolated (CTRL.SPLITPOWER=0), RTC_CVDD must be equal to or greater than CVDD.
If these power supplies are isolated (CTRL.SPLITPOWER=1), RTC_CVDD may be lower than CVDD.
(2) DVDD18 must be powered even if all of the DVDD3318_x supplies are operated at 3.3V.
(3) When an external crystal is used oscillator (OSC_VSS, RTC_VSS) ground must be kept separate from other grounds and connected
directly to the crystal load capacitor ground. These pins are shorted to VSS on the device itself and should not be connected to VSS on
the circuit board. If a crystal is not used and the clock input is driven directly, then the oscillator VSS may be connected to board ground.
(4) These IO specifications apply to the dual-voltage IOs only and do not apply to DDR2/mDDR or SATA interfaces. DDR2/mDDR IOs are
1.8V IOs and adhere to the JESD79-2A standard.
76
Specifications
DESCRIPTION
CONDITION
1.3V operating point
1.2V operating point
1.1V operating point
1.0V operating point
456 MHz versions
375 MHz versions
1.8V operating point
3.3V operating point
1.8V operating point
3.3V operating point
1.8V operating point
3.3V operating point
Submit Documentation Feedback
Product Folder Links:
MIN
1.25
1.14
1.05
0.95
1.25
1.14
0.9
1.14
1.14
1.14
1.14
1.71
3.15
1.71
3.15
1.71
1.71
1.71
0.49*
DDR_DVDD18
DDR_DVDD18
1.71
3.15
1.71
3.15
1.71
3.15
0
(4)
2
(4)
0.65*DVDD
0.8*RTC_CVDD
0.8*CVDD
(4)
(4)
Copyright © 2009–2017, Texas Instruments Incorporated
TMS320C6748
www.ti.com
NOM
MAX
UNIT
1.3
1.35
1.2
1.32
V
1.1
1.16
1.0
1.05
1.3
1.35
V
1.2
1.32
1.2
1.32
V
1.2
1.32
V
1.2
1.32
V
1.2
1.32
V
1.2
1.32
V
1.8
1.89
V
3.3
3.45
V
1.8
1.89
V
3.3
3.45
V
1.8
1.89
V
1.8
1.89
V
1.8
1.89
V
0.5*
0.51*
V
DDR_DVDD18
Vss
V
1.8
1.89
V
3.3
3.45
V
1.8
1.89
V
3.3
3.45
V
1.8
1.89
V
3.3
3.45
V
0
0
V
V
V
V
V
0.8
V
0.35*DVDD
V
0.2*RTC_CVDD
V
0.2*CVDD
V
Advertisement
Table of Contents
