Inter-Integrated Circuit Serial Ports (I2C) - Texas Instruments TMS320C6748 Manual

TMS320C6748
SPRS590G – JUNE 2009 – REVISED JANUARY 2017

6.18 Inter-Integrated Circuit Serial Ports (I2C)

6.18.1 I2C Device-Specific Information
Each I2C port supports:
• Compatible with Philips® I2C Specification Revision 2.1 (January 2000)
• Fast Mode up to 400 Kbps (no fail-safe I/O buffers)
• Noise Filter to Remove Noise 50 ns or less
• Seven- and Ten-Bit Device Addressing Modes
• Master (Transmit/Receive) and Slave (Transmit/Receive) Functionality
• Events: DMA, Interrupt, or Polling
• General-Purpose I/O Capability if not used as I2C
Figure 6-42 is block diagram of the device I2C Module.
Clock Prescaler
Bit Clock Generator
Noise
I2Cx_SCL
Filter
Transmit
Noise
I2Cx_SDA
Filter
Receive
Control
182 Peripheral Information and Electrical Specifications
Prescaler
I2CPSCx
Register
Clock Divide
I2CCLKHx
High Register
Clock Divide
I2CCLKLx
Low Register
Transmit Shift
I2CXSRx
Register
I2CDXRx Transmit Buffer
Receive Buffer
I2CDRRx
Receive Shift
I2CRSRx
Register
Pin Function
I2CPFUNC
Register
Pin Direction
I2CPDIR
Register
Pin Data In
I2CPDIN
Register
Figure 6-42. I2C Module Block Diagram
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Control Control
Own Address
I2CCOARx
Register
Slave Address
I2CSARx
Register
I2CCMDRx Mode Register
Extended Mode
I2CEMDRx
Register
Data Count
I2CCNTx
Register
Peripheral ID
I2CPID1
Register 1
Peripheral ID
I2CPID2
Register 2
Interrupt/DMA
Interrupt Enable
I2CIERx
Register
Interrupt Status
I2CSTRx
Register
Interrupt Source
I2CSRCx
Register
Pin Data Out
I2CPDOUT
Register
Pin Data Set
I2CPDSET
Register
Pin Data Clear
I2CPDCLR
Register
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Peripheral
Configuration
Bus
Interrupt DMA
Requests