Epson SQ-B50/2550 Technical Manual page 272

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REV.-A
A.1.1.5 E05A24GA
This gate array
le
has an 8-bit parallel I/F circuit and an expanded port function.
DINO
1
64
GND
DINl
2
63
P14
DIN2
3
62
P13
DIN3
4
61
P12
DIN4
5
60
Pl1
Vcc
6
59
PlO
DIN5
7
58
GND
DIN6
8
57
AFXT
DIN7
9
56
D7
STB
10
55
D6
RXD
11
54
D5
INIT
12
53
D4
GND
13
52
D3
lOUT
14
51
D2
ITO
15
50
Dl
TM
16
49
DO
RST
17
48
GND
N.G.
18
47
GlK
SlGT
19
46
TESTEN
IBF
20
45
SOUT
RDY
21
44
WDOG
N.G.
22
43
WR
BUSY
23
42
RD
AGK
24
41
GE
N.G.
25
40
A2
ERROR
26
39
Vcc
N.G.
27
38
Al
PE
28
37
AO
GND
29
36
SlGTIN
P20
30
35
PIS
P21
31
34
GND
P22
32
33
P23
Figure A.10 E05A24GA Pin Diagram
DIN7-0
..
STB
..
ACK
BUSY
PE
..
ERROR
-
SlCT
INIT
. .
AFXT
..
SUN
..
PIS
..
IBF
ITO
lOUT
RDY
Vcc
-
GND
Serial
IIF
General
I/O
Port
Parallel
IIF
Watch
Dog
Timer
System
System
Bus
Power
..
RXD
---t"-SOUT
-----TM
__- - t .. _ P10 - P13
- - - - - - e .. _
P14
- - - - C l K
- - - - - - e .. _
WDOG
- - - - - TESTENB
_-----e .. _
D7 - 0
..
A7-0
-----CE
..
RD
-----WR
-----RST
Figure A.11 E05A24GA Block Diagram
A-14

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