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REV.-A
A.1.1.1 HD64180
The HD64180 is an 8-bit one-chip CPU, and is software compatible with model Z-80 and higher models.
The chip includes a DMA controller (DMAC), asynchronous serial communication interface (ASCI) (2
channels), serial I/O port, and timers (one with internal and one with external output), in addition to
the CPU.
The main features are as follows:
• MMU: 512K-byte physical address space
• DMAC (2 channels): High speed data transfer between memories (including memory mapped I/O)
• ASCI (2 channels): Start-stop asynchronous system (full duplex) SCI modem control signals
• CS I/O port (1 channel): Serial to parallel conversion shift register
•
16-bit timer (2 channels): Pulse output function
• Interrupts: Internal (4), external (8)
• Bus I/F: 80 CPU-line bus I/F
• Dynamic RAM refresh controller: Programmable refresh interval
• Low speed memory input/output I/F: Programmable number of weight states
• Built-in clock oscillator circuit
• CMOS
Figures A-1 and A-2 show the pin diagram and internal block diagram. Table A-2 shows the terminal
functions.
Vss
XTAL
EXTAL
WAIT
BUSACK
BUSREQ
RESET
NMI
INTo
INi~
INT,
ST
o
Figure A-1. HD64180 Pin Diagram
A-2
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