Interrupt Priority Levels; Fast Interrupts; Clearing Interrupt Flags - Freescale Semiconductor DSP56800E User Manual

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Core System Infrastructure
2.5.1.4

Interrupt Priority Levels

On 56F800E hybrid microcontroller family, each interrupt can be assigned the interrupt priority
level (IPL). It is the number from 0 (lowest priority) to 3 (highest priority). When servicing the
interrupt, until the RTI instruction is executed, the other interrupts of the same and lower priority
levels are masked (temporarily disabled). If there is an interrupt request of the masked priority
level, its processing is postponed until the level is unmasked again.
This model assures that the interrupts of the same level can not "nest" one to each other. On the
other hand, the higher priority interrupts do nest to the lower priority interrupts.
2.5.1.5

Fast Interrupts

Up to 2 interrupt sources can be declared as Fast Interrupts. The Fast Interrupts jump directly to a
service routine based on values in the Fast Interrupt Vector Address registers without having to go
to a jump table first.
IRQs used as fast interrupts MUST be set to priority level 2. Unexpected results can occur if a fast
interrupt vector is set to any other priority.
Caution: A special Fast Interrupt Return instruction (frtid) must be used in order to return from
the Fast Interrupt service routine. There are also several limitations in the way how the Fast
Interrupt service routine can be coded. See the 56800E Processor Core Reference Manual for
more details.
2.5.1.6

Clearing Interrupt Flags

Each on-chip peripheral interrupt source has its own interrupt flag, which must be cleared after
the interrupt is serviced. For each peripheral module, the method of clearing the interrupt flag is
different. As the DSP56800E_Quick_Start tool does not add any infrastructure code to the
interrupt service routines, it also does not clear the interrupt flag inside the ISR. See Code
Example 2-34.
Example 2-34. Clearing Interrupt Flags inside ISR
/*******************************************************************************
PWM A Reload Interrupt Service Routine
********************************************************************************/
#pragma interrupt
void pwmAReloadISR(void)
{
/* ISR code */
...
/* clear Reload interrupt flag */
ioctl(PWM_A, PWM_CLEAR_RELOAD_FLAG, NULL);
}
This example shows the PWMA Reload Interrupt Service Routine. Note that the PWM_CLEAR_
RELOAD_FLAG ioctl() command is used to clear the Reload Interrupt Flag (Bit 5) in the PWM
Control Register and that this is the user's responsibility.
2-26
Targeting 56F8xxx Platform
FREESCALE SEMICONDUCTOR

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