Sci Driver - Freescale Semiconductor DSP56800E User Manual

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SCI Driver

This section describes the API for the MC56F83xx and the MC56F80xx Serial Communication

Interface (SCI). The functionality of the SCI module itself is described in the MC56F83xx

Peripheral User Manual, 56F8000 Peripheral Reference Manual, 56F802x/3x Peripheral

Reference Manual and 56F800x Peripheral Reference Manual.

Introduction

There are either one or two SCI modules on each 56F8xxx family member. SCI pins are always

shared with GPIO pins, so the GPIO module must be configured to enable peripheral functionality

of all SCI pins used.

Each SCI module has a 13-bit baud rate selection (16-bit on MC56F802x/3x and MC56F800x),

programmable 8-bit or 9-bit data format and hardware parity checking. Four interrupt requests

can be generated by the SCI module (Receiver Full, Receiver Error, Transmitter Empty,

Transmitter Idle).

The MC56F802x/3x family newly adds a support for a queued operation of SCI (receive and

transmit FIFOs), enabling to lower the interrupt rate to CPU and to simplify software design in

some scenarios. The SCI module with such a queued capability is often referred as QSCI.

However, the module identifier used in the low-level drivers of DSP56800E_Quick_Start and in

appconfig.h initialization values remains SCI, SCI_0 or SCI_1 for backward code compatibility.

Quick Reference

This section is intended to be a source of quick access information while the details are discussed

in Section 5.15.3.

Module base address

SCI 0 (SCI0_BASE)

SCI 1 (SCI1_BASE)

API Definition

The following header files are needed in order to use the SCI device driver:

Required Header File(s):

#include "qs.h"

#include "sci.h"

Public Data Structure(s):

FREESCALE SEMICONDUCTOR

Table 5-528. SCI Module Base Address

Targeting 56F8xxx Platform

MC56F802x/3x

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