Targets Of The Mc56F8357Evm Project; Targets Of The Mc56F8367Evm Project - Freescale Semiconductor DSP56800E User Manual

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Core System Infrastructure
Data
Target Name
Model
LDM_ExtRam
Large
LDM_xFlash
Large
LDM_pFlash
Large
LDM_IntRam
Large
LDM_Simulator
Large
SDM_ExtRam
Small
SDM_xFlash
Small
SDM_pFlash
Small
Data
Target Name
Model
LDM_ExtRam
Large
LDM_xFlash
Large
LDM_pFlash
Large
LDM_IntRam
Large
LDM_Simulator
Large
SDM_ExtRam
Small
2-36
Table 2-23. Targets of the MC56F8357EVM project.
Memory Used
Code
Boot
Data
Location
Ext RAM
0x0000
Ext RAM
(0x0000)
(0x2000)
pFlash
0x20000
Int xRAM
(0x0000)
(0x0000)
pFlash
0x20000
Int xRAM
(0x0000)
(0x0000)
Ext RAM
n/a
Int xRAM
(0x0000)
(0x0000)
0x0000
n/a
0x0000
(sim)
(sim)
Ext RAM
0x0000
Ext RAM
(0x0000)
(0x2000)
pFlash
0x20000
Int xRAM
(0x0000)
(0x0000)
pFlash
0x20000
Int xRAM
(0x0000)
(0x0000)
Table 2-24. Targets of the MC56F8367EVM project.
Memory Used
Code
Boot
Data
Location
Ext RAM
0x0000
Ext RAM
(0x0000)
(0x2000)
pFlash
0x20000
Int xRAM
(0x0000)
(0x0000)
pFlash
0x20000
Int xRAM
(0x0000)
(0x0000)
Ext RAM
n/a
Int xRAM
(0x0000)
(0x0000)
0x0000
n/a
0x0000
(sim)
(sim)
Ext RAM
0x0000
Ext RAM
(0x0000)
(0x2000)
Targeting 56F8xxx Platform
EVM
Board
Initial
Constant
Jumpers
Data
Data
n/a
Ext RAM
JG4 off
(0x2000)
JG5 on
xFlash
xFlash
JG4 on
pFlash
xFlash
JG4 on
n/a
Int RAM
JG4 off
JG5 on
n/a
0x0000
n/a
(sim)
n/a
Ext RAM
JG4 off
(0x2000)
JG5 on
xFlash
xFlash
JG4 on
pFlash
xFlash
JG4 on
EVM
Board
Initial
Constant
Jumpers
Data
Data
n/a
Ext RAM
JG4 off
(0x2000)
JG5 on
xFlash
xFlash
JG4 on
pFlash
xFlash
JG4 on
n/a
Int RAM
JG4 off
JG5 on
n/a
0x0000
n/a
(sim)
n/a
Ext RAM
JG4 off
(0x2000)
JG5 on
FREESCALE SEMICONDUCTOR
Target Description
Standard Debug project with
External Memory
Stand Alone application
Stand Alone application
Debugging/Experimetnal
(performance testing on
separate P and X buses)
Software simulator of the
processor core
Standard Debug project with
External Memory
Stand Alone application
Stand Alone application
Target Description
Standard Debug project with
External Memory
Stand Alone application
Stand Alone application
Debugging/Experimetnal
(performance testing on
separate P and X buses)
Software simulator of the
processor core
Standard Debug project with
External Memory

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