Spi Driver - Freescale Semiconductor DSP56800E User Manual

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SPI Driver

This section describes the API for the MC56F83xx and MC56F80xx Serial Peripheral Interface

(SPI). The functionality of the SPI module itself is described in the MC56F83xx Peripheral User

Manual, 56F8000 Peripheral Reference Manual and 56F802x/3x Peripheral Reference

Manual and 56F800x Peripheral Reference Manual.

Introduction

There are either one or two SPI modules on each 56F8xxx family member. The SPI module

allows full-duplex, synchronous, serial communication between the controller and peripheral

devices or other controllers. It features master and slave modes, double-buffered operation,

transmission length 2-16bits, programmable frequency and various other options. Programmable

clock options enables to adapt the SPI module to any SPI compatible device. This section

describes the SPI driver software providing the lowest level software layer, interfacing hardware

with software.

The MC56F802x/3x family newly adds a support for queued operation of SPI (receive and

transmit FIFOs), enabling to lower the interrupt rate to CPU and/or to simplify software design in

some scenarios. The SPI module with a queued capability is often referred as QSPI. However, the

module identifier used in the low-level drivers of DSP56800E_Quick_Start and in appconfig.h

initialization values remains SPI, SPI_0 or SPI_1 for backward compatibility.

Quick Reference

This section is intended to be a source of quick access information, while the details are discussed

in Section 5.16.3.

Module base address

SPI (SPI_BASE)

SPI0 (SPI0_BASE)

SPI1 (SPI1_BASE)

API Definition

The following header files are needed in order to use the SPI device driver:

Required Header File(s):

FREESCALE SEMICONDUCTOR

Table 5-590. SPI Module Base Address

Targeting 56F8xxx Platform

MC56F802x/3x

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