Archenableintlvl23 - Enable Interrupts Levels 2 And 3 - Freescale Semiconductor DSP56800E User Manual

Core System Infrastructure
2.4.1.3

archEnableIntLvl23 - enable interrupts levels 2 and 3

Call(s):
void archEnableIntLvl23(void);
Arguments: None.
Description: The archEnableIntLvl23 macro enables interrupts at levels 2 and 3 while masking
interrupts at levels 0 and 1. It is accomplished by setting bit I1 (Bit 9) and clearing I0 (Bit 8) in the
Status Register (SR).
Example 2-5. archEnableIntLvl23 macro usage
archEnableIntLvl23();
2.4.1.4 archDisableInt - disable interrupts
Call(s):
void archDisableInt(void);
Arguments: None.
Description: The archDisableInt macro disables all maskable interrupts by setting bits I1 and I0
(Bits 9 - 8) in the Status Register (SR).
Example 2-6. archDisableInt macro usage
archDisableInt();
2.4.1.5 archResetLimitBit - reset limit bit
Call(s):
void archResetLimitBit(void);
Arguments: None.
Description: The archResetLimitBit macro resets limit bit (L) - Bit 6 in the Status Register (SR).
Example 2-7. archResetLimitBit macro usage
archResetLimitBit();
2-8 Targeting 56F8xxx Platform FREESCALE SEMICONDUCTOR