Configuring Line Synchronization; Configuring Bits Synchronization Mode - AudioCodes Mediant 3000 User Manual

SIP User's Manual

11.1.2 Configuring Line Synchronization

In Line Synchronization mode, both active and redundant blades are synchronized by the
same clock reference to OC-3/STM-1 links, T3, T1 or E1 trunks. When the source clock
reference link/trunk fails, both active and redundant blades change into hold-over mode.
The following ini file parameters are required for configuring this mode:
TMMode: defines the mode - set this to 2.
TDMBusClockSource: selects the clock source (i.e., from the network/trunk or from the
device itself, i.e., internal). Note that in this mode, the following option values are
supported:
•
[4] Network
•
[20] Network_DS3_1
•
[21] Network_DS3_2
TDMBusLocalReference: selects the trunk from which the clock is derived.
PLLOutOfRange.
For a full description of these parameters, refer to ''PSTN Parameters'' on page 353.

11.1.3 Configuring BITS Synchronization Mode

In BITS Synchronization mode, both active and redundant blades are synchronized by two
Building Integrated Timing Source (BITS) input trunks. The BITS trunks flow through two
SAT blades (housed in the Mediant 3000 front-panel chassis), each with a designated
timing module. Two SAT blades are required to ensure seamless clock operation in case of
failure of one of the SATs timing-modules (i.e., clock redundancy).
When one of the BITS reference clock sources fails, the Mediant 3000 automatically
switches to the secondary source as a reference clock for the entire device. Automatic
failover of the BITS reference clock source can be disabled by using the ini file parameter
TDMBusEnableFallback. When TDMBusEnableFallback is disabled (i.e., set to 0), the
device always uses the clock source with the higher priority, even when this source fails.
This is a "manual" mode and is primarily intended for use in the lab and is not
recommended.
When a BITS reference clock source with a higher priority returns to service after failure,
the device may either revert to the higher-priority clock source or continue using the lower-
priority clock source. This behavior is controlled using the TDMBusEnableFallback
parameter. When both BITS reference clock sources fail, the device enters into clock
holdover.
Both BITS references are constantly monitored. When one BITS reference fails and
TDMBusEnableFallback parameter is set to none-revertive or auto-revertive state, the
second BITS reference is used. When both BITS references are at fault, the device
switches to holdover.
The BITS Synchronization mode is configured using the following parameters:
TMReferenceValidationTime: time were reference must have an alarm cleared before
the device declares it as a valid reference
PLLOutOfRange: for TP-8410, this parameter changes the valid frequency offset for
reference validation. For TP-6310, PLL valid frequency offset could not be changed,
out of range default value is 4.6 ppm.
Version 5.8
11. Advanced PSTN Configuration
527 September 2009