NEC PD754144 User Manual page 111

Figure 6-18. Example of Incorrect Resonator Connection (3/3)
(d) Current flowing through power line of oscillator
(potential at points A, B, and C changes)
V
DD
(e) Signal fetched
CL1
(3) Divider circuit
The divider circuit divides the output of the system clock oscillator to create various clock signals.
CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
µ
• PD754144
µ PD754144
PORTn
(n = 3, 6-8)
CL1 CL2 V
SS
A B
High current
µ
• PD754144
µ PD754144
CL2 V
SS
User's Manual U10676EJ3V0UM
µ
• PD754244
V
DD
µ PD754244
PORTn
(n = 3, 6-8)
X1 X2
A B
High current
µ
• PD754244
µ PD754244
X1 X2 V
SS
V
SS
C
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