NEC PD754144 User Manual page 125

Note
SET1
8
–
TM26 TM25 TM24 TM23 TM22 TM21 TM20
Decoder
f
X
f
X
f /2
X
From clock
4 MPX
f /2
X
generator
6
f /2
X
f /2
X 8
10
f /2
X
Internal bus
8
TM2 TMOD2H
High-level period setting
Modulo register (8)
modulo register (8)
8 8
MPX (8)
8
Match
Comparator (8)
8
Count register (8)
CP
Clear
16-bit timer counter mode
Timer operation starts
Timer counter (channel 1)
match signal (in 16-bit timer counter mode)
8 8
TMOD2
– – –
0
TOE2 NRZB NRZ
REMC
Re-
load
TOUT
F/F
Reset
Overflow
Carrier generator mode
Timer counter
(channel 1) clear signal
(in 16-bit timer
Timer counter (channel 1)
counter mode)
match signal (in carrier generator mode)
TC2 PORT3.2 Bit 2 of PMGA
P32
Port 3
output
l/O mode
latch
P32/PTO2
Output buffer
Timer counter
(channel 1) clock input
INTT2 (lRQT2 set signal)
IRQT2 c]ear signal
RESET