NEC PD754144 User Manual page 53

CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
Hardware name (symbol)
Address
b3 b2
F90H Timer counter 2 mode register (TM2)
TOE2 REMC
F92H
................................................................................
Timer counter 2 control register (TC2)
................................................................................
0 –
F94H Timer counter 2 count register (T2)
F96H Timer counter 2 modulo register (TMOD2)
F98H Unmounted
to
F9FH
Figure 3-7. µ PD754244 I/O Map (2/8)
Number of bits that
can be manipulated
R/W
b1 b0 1-bit
R/W (W)
–
NRZB NRZ
R/W
–
– –
R –
R/W –
User's Manual U10676EJ3V0UM
Bit
manipulation
addressing
4-bit 8-bit
– – Bit manipulation can be performed only on bit 3
– –
– Bit 3 can only be written
– Only 0 can be written to bit 3
– –
– –
Remarks
53