CHAPTER 3 FEATURES OF ARCHITECTURE AND MEMORY MAP
Figure 3-2. Data Memory Configuration and Addressing Range for Each Addressing Mode
Addressing mode
Memory bank enable flag MBE = 0 MBE = 1 MBE = 0 MBE = 1
000H
General-
purpose
01FH
register area
020H
Data area (SRAM)
07FH
Memory bank 0
Not
incorporated
0FFH
400H
Data area
(EEPROM16 × 8)
41FH
Memory bank 4
Not
incorporated
4FFH
F80H
FB0H
Peripheral
hardware area
FBFH
(memory bank 15)
FC0H
FF0H
FFFH
Remark
– : don't care
Caution EEPROM can be manipulated by the following 8-bit manipulation instructions only.
MOV
XA, @HL
MOV
XA, mem
MOV
@HL, XA
MOV
mem, XA
mem
@HL
mem. bit
@H+mem. bit
MBS = 0
MBS = 0
MBS = 4
MBS = 4
MBS =
MBS =
15
15
XCH
XA, @HL
XCH
XA, mem
SKE
XA, @HL
User's Manual U10676EJ3V0UM
@DE
Stack
fmem. bit pmem. @L
addressing
@DL
–
–
–
SBS = 0
–
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