Setting Of Timer Counter Control Register; Setting Of Timer Counter Output Enable Flag - NEC PD754144 User Manual

(b) Timer counter control register (TC2)
In the 8-bit timer counter mode, set TC2 as shown in Figure 6-32 (for the format of TC2, refer to Figure
6-30 Format of Timer Counter Control Register).
TC2 is manipulated by an 8- or 4-bit, or bit manipulation instruction.
The value of TC2 is cleared to 00H when the internal reset signal is asserted.
The flags shown by a solid line in the figure below are used in the 8-bit timer counter mode.
Do not use the flags shown by a dotted line in the figure below in the 8-bit timer counter mode (clear these
flags to 0).
7 6
0 –
Timer counter output enable flag
TOE2
0
1
Figure 6-33. Setting of Timer Counter Output Enable Flag
Address
FA2H TOE0
FAAH TOE1
(2) Time setting of timer counter
138
CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
Figure 6-32. Setting of Timer Counter Control Register
5 4 3
– – TOE2 REMC
Disabled (low level output)
Enabled
Channel 0
Channel 1
User's Manual U10676EJ3V0UM
2 1 0 Symbol
NRZB NRZ TC2
Timer output
Timer counter output enable flag (W)
0 Disabled (low level output)
1 Enabled