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(2) Conventions for explanation of operation
A:
A register; 4-bit accumulator
B:
B register
C:
C register
D:
D register
E:
E register
H:
H register
L:
L register
X:
X register
XA:
Register pair (XA); 8-bit accumulator
BC:
Register pair (BC)
DE:
Register pair (DE)
HL:
Register pair (HL)
XA':
Expansion register pair (XA')
BC':
Expansion register pair (BC')
DE':
Expansion register pair (DE')
HL':
Expansion register pair (HL')
PC:
Program counter
SP:
Stack pointer
CY:
Carry flag; bit accumulator
PSW:
Program status word
MBE:
Memory bank enable flag
RBE:
Register bank enable flag
PORTn: Port n (n = 3, 6, 7, 8)
IME:
Interrupt master enable flag
IPS:
Interrupt priority select register
IE×××:
Interrupt enable flag
RBS:
Register bank select flag
MBS:
Memory bank select flag
PCC:
Processor clock control register
. :
Address or bit delimiter
Contents addressed by ××
(××):
××H:
Hexadecimal data
CHAPTER 11 INSTRUCTION SET
User's Manual U10676EJ3V0UM
239
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