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X1
System
clock
oscillator
X2
PCC
PCC0
PCC1
4
PCC2
HALT
Note
PCC3
STOP
Note
PCC2,
PCC3
clear
Note Instruction execution
Remarks 1.
f
: System clock frequency
X
Φ = CPU clock
2.
3.
PCC: Processor Clock Control Register
4.
One clock cycle (t
104
CHAPTER 6 PERIPHERAL HARDWARE FUNCTION
Figure 6-14. Block Diagram of Clock Generator (2/2)
(b) µ PD754244 Crystal/Ceramic Oscillation
f
X
1/2 1/4 1/16
Oscillation stops
STOP F/F
Q
S
R
) of the CPU clock is equal to one machine cycle of the instruction.
CY
User's Manual U10676EJ3V0UM
· Basic interval timer (BT)
· Timer counter
· INT0 noise eliminator
1/1 to 1/4096
Divider
HALT F/F
S
R
Q
Wait release signal from BT
Reset signal
(selectable by mask option)
Standby release signal from
interrupt controller
Divider
Φ
1/4
· CPU
· INT0 noise
eliminator
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